With 14 years of experience in verification and nearly 100 engineers in two design centers EEE has a long track of different verification projects – IP, subsystem and SoC level.
VERIFICATION FIELDS
Working closely with many customers our engineers are fully able to integrate into customer’s verification teams, or take full ownership of a verification project. Our expertise covers:
- Pure digital and digital-mixed-signal design verification
- Simulation based verification using UVM/eRM/direct methodologies
- RTL, Power Aware, GLS simulations
- Formal Verification
- Power analysis, Performance, Stress testing, CDC & RDC analysis
- Firmware verification in simulation environment
PROCESS
Scope of work covered by our teams:
- Project management and planning
- Verification tools setup
- Functional spec assessment
- Verification Metrics, verification plan and test plans definition
- Verification environment architecture definition, development and maintenance
- Test suite development and debug
- Regression runs
- Coverage analysis
ARCHITECTURE
These projects enable us to gain valuable experience in verification of:
- High-performance programmable SoC
- Multimedia application processors
- Low power SoC
- Various ARM core based systems
- Multimedia subsystems
- Different communication protocols
- Memory controllers
- FPGA programmable logic matrix
- Power, reset and clock management logic
- Debug and test logic
INDUSTRIES
Products we have been verified are developed for different industries:
- Audio
- Consumer Electronics / Multimedia
- Health/Medical
- Smart Grid
- Automotive
- Telecommunications
- FPGA
- High Performance Computing
There are no universal tools in IC design verification. Only a combination of different approaches, methodologies and tools will provide full verification coverage. But neither the best verification methodology nor the tools can replace the knowledge of engineers performing design verification. Read more...
Aleksandar Jakovljević
SoC DV Domain Lead