Apply before June 7th 2024!
Make your first step toward a successful career
All candidates will be notified about their application status in a timely manner, while the start is planned for 15th July. Good luck with the interviews!

Hardware Design Engineer

You will be a part of a digital/mixed-signal hardware design team, constituted of hardware engineers with different level of experience, from experts to juniors. In order to achieve hardware design and production milestones you will be involved in analysis of product requirements, creation od product specification, schematic drawing, PCB layout design, board bringup, hardware test and verification. Your work on these activities will be challenging and you will have the opportunity to work with industry experts on the state-of-the-art processes, tools and flows. – Selected candidates will be engaged in development of a digital/mixed-signal hardware product including:

Internship Timeline

week 2
Read product specification

Analyze product requirements
week 5
Make concept specification

Create block design

Select components
week 8
Schematic drawing
week 11
PCB layout design
Week 12 (and 13)
Prototyping

PCB manufacture + assembly

Board bringup tests
week 2
Read product specification

Analyze product requirements
week 5
Make concept specification

Create block design

Select components
week 8
Schematic drawing
week 11
PCB layout design
week 12 (and 13)
Prototyping -  PCB manufacture + assembly

Board bringup tests

Employee Benefits:

FULLY REMOTE​

PROFESSIONAL,
YOUNG & DYNAMIC TEAM​

PROFESSIONAL DEVELOPMENT
OPPORTUNITIES​

COMPETITIVE SALARIES
& BENEFITS​

ADDITIONAL HEALTH INSURANCE,
SPORT & SOCIAL ACTIVITIES​​

INTERNATIONAL WORK ENVIRONMENT &
TRAVELING OPPORTUNITIES​

Required Skills and Qualifications:

Final year student or fresh graduate with B.Sc. or M.Sc. degree in electrical engineering

Motivated, proactive, hard working

Relevant courses/knowledge: basics of digital electronics, VLSI basics,
Architectures of Micro Computing Systems

Good knowledge of English language

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Apply before 31st December 2024!
Make your first step toward a successful career

All candidates will be notified about their application status in a timely manner,
while the start is planned for 3rd March 2025. Good luck with the interviews!

Growth empowered by passion and expertise. Employee satisfaction and loyalty are achievable only in environments where mutual understanding, respect, and trust exist. The mission of the HR department is to secure and further nurture these values.

Ivana Maričić
HR Manager

GRADUATION THESIS LIST

#TopicDomain
1Clock domain crossing – issues and how to overcome themDD
2Scheduling techniques and their implementation for queue servicingDD
3Functional safety approaches implementation  in digital designDD
4Temperature sensor IP – Analysis, modeling and verificationAMS
5Bandgap reference IP – Analysis, modeling and verificationAMS
6Voltage regulator IP – Analysis, modeling and verificationAMS
7Internal oscillator IP – Analysis, modeling and verificationAMS
8Power-on Reset IP – Analysis, modeling and verificationAMS
9IP verification – MAC merge sublayer IP – MMSL – Link Layer Discovery Protocol control – LLDPDV
10IP verification – MAC merge sublayer IP – MMSL – MAC RxDV
11IP verification – MAC merge sublayer IP – MMSL – MAC TxDV
12SoC integration – 3PIAS ProjekatDD+DV
13SoC integration – ARM – Cortex M0 platform Integration using ARM SDKDD+DV
14SoC integration – ARM – Cortex M3 platform Integration using ARM SDKDD+DV
15SoC Verification – interdisciplinary themes – SW coverage collection and analysisDV
16SoC Verification – interdisciplinary themes – CPU instructions provided by SV TB instead of reading from Memory; (SV + ARM architecture)DV
17VIP Development – PCI ExpressDV
18VIP Development – DDRDV
19VIP Development – EthernetDV
20VIP Development – USBDV
21VIP Development – CSIDV
22VIP Development – DSIDV
23VIP Development – UNIPRODV
24VIP Development – I3CDV
25VIP Development – SLIMbusDV
26VIP Development – HDMIDV
Please note, although thesis are created in collaboration with professors, you need to get final approval by your UNI professor.