My Engineering Story: Marija, AMS Verification Engineer

I have the opportunity to meet and collaborate with top engineers, in an extremely pleasant working environment, and in a company that works on serious projects, and at the same time, it facilitates both the professional and personal development of each employee.

Belgrade, July 8th, 2023

 

I became interested in the profession that I am engaged in today when I was in the 4th year of studying Electronics at the Faculty of Electrical Engineering in Podgorica. However, my fascination by Electronics appeared in my childhood, while I was spending time in my neighbor’s workshop and observing the way he repairs various devices and their parts.

 

I got some information about the Elsys company through one of the employed engineers, who presented the company to me from his personal experience in such a way that I immediately decided to apply for an internship. What motivated me to continue my work engagement at Elsys is the fact that during my internship I had the opportunity to meet and collaborate with top engineers, in an extremely pleasant working environment, and in a company that works on serious projects, and at the same time, it facilitates both the professional and personal development of each employee.

 

Today, I work at Elsys as an AMS Verification Engineer, and what makes my job particularly interesting is the fact that AMS represents the link between the analog and digital worlds, and the need for multifunctional chips is constantly growing…

 

If you’ve found Marija’s story interesting, check out our Analog Mixed-Signal Design and Verification Internship Program, and find out more information on how to become Junior AMS Design and Verification Engineer at Elsys Eastern Europe.

 

WHERE PASSION LEADS TO EXCELLENCE

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GRADUATION THESIS LIST

#TopicDomain
1Clock domain crossing – issues and how to overcome themDD
2Scheduling techniques and their implementation for queue servicingDD
3Functional safety approaches implementation  in digital designDD
4Temperature sensor IP – Analysis, modeling and verificationAMS
5Bandgap reference IP – Analysis, modeling and verificationAMS
6Voltage regulator IP – Analysis, modeling and verificationAMS
7Internal oscillator IP – Analysis, modeling and verificationAMS
8Power-on Reset IP – Analysis, modeling and verificationAMS
9IP verification – MAC merge sublayer IP – MMSL – Link Layer Discovery Protocol control – LLDPDV
10IP verification – MAC merge sublayer IP – MMSL – MAC RxDV
11IP verification – MAC merge sublayer IP – MMSL – MAC TxDV
12SoC integration – 3PIAS ProjekatDD+DV
13SoC integration – ARM – Cortex M0 platform Integration using ARM SDKDD+DV
14SoC integration – ARM – Cortex M3 platform Integration using ARM SDKDD+DV
15SoC Verification – interdisciplinary themes – SW coverage collection and analysisDV
16SoC Verification – interdisciplinary themes – CPU instructions provided by SV TB instead of reading from Memory; (SV + ARM architecture)DV
17VIP Development – PCI ExpressDV
18VIP Development – DDRDV
19VIP Development – EthernetDV
20VIP Development – USBDV
21VIP Development – CSIDV
22VIP Development – DSIDV
23VIP Development – UNIPRODV
24VIP Development – I3CDV
25VIP Development – SLIMbusDV
26VIP Development – HDMIDV
Please note, although thesis are created in collaboration with professors, you need to get final approval by your UNI professor.