My Engineering Story: Bogdan, Junior IP Design Verification Engineer

At first digital verification seemed difficult to me, but quickly I grasped the concepts and as time moved on it seemed more and more fun and challenging. It was really interesting to dive into how hardware is designed, see all the possible bugs and errors that may arise

I have spent much of my youth playing around with computers and even learning some programming in high school, it was only natural that I was drawn to computer science, so I enrolled at the School of Electrical Engineering in Belgrade. My first intention was to choose the Computer Engineering and Information Theory module in the second year, but as time went on I had more and more doubts. As I learned more and more in the course Fundamentals of Electrical Engineering, I felt more drawn to the physical hardware part of machines than the software part. The tipping point for me for choosing the Electronics module in the second year was during taking the Fundamentals of Computer Engineering course in the second semester. In this course I learned about logic gates, flip flops, and other simple digital electronics components. I started researching more about digital electronics and I started to feel that this is what I want to focus on, learn more about it and that I can be good at it.

In the second and third year of my studies I learned more of the fundamentals that would come in handy later. There were some courses about analogue electronics that I didn’t really care for, but the courses related to digital electronics were really fun and interesting to me.

In the fourth year finally, stuff got really interesting when we got to play around with FPGA boards on the Introduction to VLSI Systems Design course. There were learned a very important part of my job today – Hardware Description Languages. This course was the best one I took, for the project I had recreated the Flappy Bird game fully on the FPGA board, the game was made only with hardware in VHDL.

Then it came time to look for an internship. A couple of professors mentioned Elsys offering a good internship for us, and a couple of times colleagues from Elsys came to our classes to present opportunities at their company. I got interested, spoke to older friends that I knew that worked at Elsys, and decided to apply for the internship. At first, I wanted to apply for the digital design position, but they were all filled already. I had doubts about digital verification, but I still accepted the position.

At first digital verification seemed difficult to me, but quickly I grasped the concepts and as time moved on it seemed more and more fun and challenging. It was really interesting to dive into how hardware is designed, see all the possible bugs and errors that may arise and develop tests and environments to check and verify the design.

Now I work as a junior digital verification engineer, so far, I have been on one major project. It was a system-on-chip project, with lots of different peripherals, CPU, and other features. My favorite part of this project is that I could see how a system like this works, dive deep into all the signals, how the CPU communicates with the peripherals, and see how it is all connected. And of course, finding mistakes in such complicated systems is always fun and rewarding.

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GRADUATION THESIS LIST

#TopicDomain
1Clock domain crossing – issues and how to overcome themDD
2Scheduling techniques and their implementation for queue servicingDD
3Functional safety approaches implementation  in digital designDD
4Temperature sensor IP – Analysis, modeling and verificationAMS
5Bandgap reference IP – Analysis, modeling and verificationAMS
6Voltage regulator IP – Analysis, modeling and verificationAMS
7Internal oscillator IP – Analysis, modeling and verificationAMS
8Power-on Reset IP – Analysis, modeling and verificationAMS
9IP verification – MAC merge sublayer IP – MMSL – Link Layer Discovery Protocol control – LLDPDV
10IP verification – MAC merge sublayer IP – MMSL – MAC RxDV
11IP verification – MAC merge sublayer IP – MMSL – MAC TxDV
12SoC integration – 3PIAS ProjekatDD+DV
13SoC integration – ARM – Cortex M0 platform Integration using ARM SDKDD+DV
14SoC integration – ARM – Cortex M3 platform Integration using ARM SDKDD+DV
15SoC Verification – interdisciplinary themes – SW coverage collection and analysisDV
16SoC Verification – interdisciplinary themes – CPU instructions provided by SV TB instead of reading from Memory; (SV + ARM architecture)DV
17VIP Development – PCI ExpressDV
18VIP Development – DDRDV
19VIP Development – EthernetDV
20VIP Development – USBDV
21VIP Development – CSIDV
22VIP Development – DSIDV
23VIP Development – UNIPRODV
24VIP Development – I3CDV
25VIP Development – SLIMbusDV
26VIP Development – HDMIDV
Please note, although thesis are created in collaboration with professors, you need to get final approval by your UNI professor.